The present disclosure relates to methods of fabricating semiconductor devices, and in particular, to methods of fabricating semiconductor devices using an optimized and/or improved optical proximity correction (OPC) model.
Due to their small size, multifunctional usage, and/or low-cost characteristics, semiconductor devices are important elements in the electronic industry. The semiconductor devices may be classified, for example, into a memory device for storing data, a logic device for processing data, and a hybrid device including both of memory and logic elements. To meet the increased demand for electronic devices with faster speeds and/or lower power consumption, semiconductor devices with high reliability, high performance, and/or multiple functions are desired. To satisfy this demand, the complexity and/or integration density of semiconductor devices are being increased, resulting in smaller manufacturing designs and patterns for the semiconductor devices.
However, in a manufacturing design having a complex mask pattern or having a pattern with sharply changing sizes and line widths, a lithography process used to transfer the design to a semiconductor wafer may be affected by diffraction of light in adjacent patterns. As a result, the layout of the transferred pattern may be different from the designed layout. In order to avoid this phenomenon, a region may be intentionally distorted when designing a mask through the use of an OPC process. However, conventional OPC processes may be inefficient and/or may not sufficiently compensate for diffracted light.